control sleep, temp on/off
This commit is contained in:
juliangaal
parent
f0c5b1790a
commit
f021c88a08
5 changed files with 277 additions and 115 deletions
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@ -13,21 +13,52 @@ fn main() -> Result<(), Mpu6050Error<LinuxI2CError>> {
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mpu.init(&mut delay)?;
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// Test power management
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println!("Test power management");
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// Test gyro config
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println!("Test gyro config");
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assert_eq!(mpu.get_gyro_range()?, range::GyroRange::D250);
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mpu.set_gyro_range(range::GyroRange::D500)?;
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assert_eq!(mpu.get_gyro_range()?, range::GyroRange::D500);
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// Test accel config
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println!("Test accel config");
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assert_eq!(mpu.get_accel_range()?, range::AccelRange::G2);
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mpu.set_accel_range(range::AccelRange::G4)?;
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assert_eq!(mpu.get_accel_range()?, range::AccelRange::G4);
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// accel_hpf
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println!("Test accel hpf");
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assert_eq!(mpu.get_accel_hpf()?, ACCEL_HPF::_RESET);
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mpu.set_accel_hpf(ACCEL_HPF::_1P25);
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mpu.set_accel_hpf(ACCEL_HPF::_1P25)?;
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assert_eq!(mpu.get_accel_hpf()?, ACCEL_HPF::_1P25);
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// test sleep
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println!("Test sleep");
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assert_eq!(mpu.get_sleep_enabled()?, false);
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mpu.set_sleep_enabled(true)?;
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assert_eq!(mpu.get_sleep_enabled()?, true);
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mpu.set_sleep_enabled(false)?;
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assert_eq!(mpu.get_sleep_enabled()?, false);
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// mpu.set_sleep_enabled(true)?;
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// test temp enable/disable
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println!("Test temp enable/disable");
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mpu.set_temp_enabled(false)?;
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assert_eq!(mpu.get_temp_enabled()?, false);
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mpu.set_temp_enabled(true)?;
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assert_eq!(mpu.get_temp_enabled()?, true);
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// reset
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println!("Test reset");
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mpu.reset_device(&mut delay)?;
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assert_eq!(mpu.get_accel_hpf()?, ACCEL_HPF::_RESET);
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assert_eq!(mpu.get_accel_range()?, range::AccelRange::G2);
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assert_eq!(mpu.get_gyro_range()?, range::GyroRange::D250);
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assert_eq!(mpu.get_sleep_enabled()?, true);
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assert_eq!(mpu.get_temp_enabled()?, false);
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println!("Test successful");
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Ok(())
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}
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224
misc/status.md
224
misc/status.md
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@ -1,112 +1,112 @@
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|Usable|Register|Access|Bits|
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|:-----|:------:|:-----:|---:|
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| <ul><li> -[ ] </li></ul>|[0x00] AUX_VDDIO| R/W | [7] AUX_VDDIO [6:1] XG_OFFS_TC [0] OTP_BNK_VLD|
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| <ul><li> -[ ] </li></ul>|[0x01] YG_OFFS_TC| R/W | [6:1] YG_OFFS_TC|
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| <ul><li> -[ ] </li></ul>|[0x02] ZG_OFFS_TC| R/W | [6:1] ZG_OFFS_TC|
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| <ul><li> -[ ] </li></ul>|[0x03] X_FINE_GAIN| R/W | [7:0] X_FINE_GAIN|
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| <ul><li> -[ ] </li></ul>|[0x04] Y_FINE_GAIN| R/W | [7:0] Y_FINE_GAIN|
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| <ul><li> -[ ] </li></ul>|[0x05] Z_FINE_GAIN| R/W | [7:0] Z_FINE_GAIN|
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| <ul><li> -[ ] </li></ul>|[0x06] XA_OFFS_H| R/W | [15:0] XA_OFFS|
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| <ul><li> -[ ] </li></ul>|[0x07] XA_OFFS_L_TC| R/W ||
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| <ul><li> -[ ] </li></ul>|[0x08] YA_OFFS_H| R/W | [15:0] YA_OFFS|
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| <ul><li> -[ ] </li></ul>|[0x09] YA_OFFS_L_TC| R/W ||
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| <ul><li> -[ ] </li></ul>|[0x0A] ZA_OFFS_H| R/W | [15:0] ZA_OFFS|
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| <ul><li> -[ ] </li></ul>|[0x0B] ZA_OFFS_L_TC| R/W ||
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| <ul><li> -[ ] </li></ul>|[0x13] XG_OFFS_USRH| R/W | [15:0] XG_OFFS_USR|
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| <ul><li> -[ ] </li></ul>|[0x14] XG_OFFS_USRL| R/W ||
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| <ul><li> -[ ] </li></ul>|[0x15] YG_OFFS_USRH| R/W | [15:0] YG_OFFS_USR|
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| <ul><li> -[ ] </li></ul>|[0x16] YG_OFFS_USRL| R/W ||
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| <ul><li> -[ ] </li></ul>|[0x17] ZG_OFFS_USRH| R/W | [15:0] ZG_OFFS_USR|
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| <ul><li> -[ ] </li></ul>|[0x18] ZG_OFFS_USRL| R/W ||
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| <ul><li> -[ ] </li></ul>|[0x19] SMPLRT_DIV| R/W | [7:0] SMPLRT_DIV|
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| <ul><li> -[ ] </li></ul>|[0x1A] CONFIG| R/W | [5:3] EXT_SYNC_SET [2:0] DLPF_CFG|
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| <ul><li> -[x] Registers </li><li> -[x] API</li></ul>|[0x1B] GYRO_CONFIG| R/W | [7] XG_ST [6] YG_ST [5] ZG_ST [4:3] FS_SEL|
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| <ul><li> -[x] Registers </li><li> -[x] API</li></ul>|[0x1C] ACCEL_CONFIG| R/W | [7] XA_ST [6] YA_ST [5] ZA_ST [4:3] AFS_SEL [2:0] ACCEL_HPF|
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| <ul><li> -[ ] </li></ul>|[0x1D] FF_THR| R/W | [7:0] FF_THR|
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| <ul><li> -[ ] </li></ul>|[0x1E] FF_DUR| R/W | [7:0] FF_DUR|
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| <ul><li> -[ ] </li></ul>|[0x1F] MOT_THR| R/W | [7:0] MOT_THR|
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| <ul><li> -[ ] </li></ul>|[0x20] MOT_DUR| R/W | [7:0] MOT_DUR|
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| <ul><li> -[ ] </li></ul>|[0x21] ZRMOT_THR| R/W | [7:0] ZRMOT_THR|
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| <ul><li> -[ ] </li></ul>|[0x22] ZRMOT_DUR| R/W | [7:0] ZRMOT_DUR|
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| <ul><li> -[x] </li></ul>|[0x23] FIFO_EN| R/W | [7] TEMP_FIFO_EN [6] XG_FIFO_EN [5] YG_FIFO_EN [4] ZG_FIFO_EN [3] ACCEL_FIFO_EN [2] SLV2_FIFO_EN [1] SLV1_FIFO_EN [0] SLV0_FIFO_EN|
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| <ul><li> -[ ] </li></ul>|[0x24] I2C_MST_CTRL| R/W | [7] MULT_MST_EN [6] WAIT_FOR_ES [5] SLV_3_FIFO_EN [4] I2C_MST_P_NSR [3:0] I2C_MST_CLK|
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| <ul><li> -[ ] </li></ul>|[0x25] I2C_SLV0_ADDR| R/W | [7] I2C_SLV0_RW [6:0] I2C_SLV0_ADDR|
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| <ul><li> -[ ] </li></ul>|[0x26] I2C_SLV0_REG| R/W | [7:0] I2C_SLV0_REG|
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| <ul><li> -[ ] </li></ul>|[0x27] I2C_SLV0_CTRL| R/W | [7] I2C_SLV0_EN [6] I2C_SLV0_BYTE_SW [5] I2C_SLV0_REG_DIS [4] I2C_SLV0_GRP [3:0] I2C_SLV0_LEN|
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| <ul><li> -[ ] </li></ul>|[0x28] I2C_SLV1_ADDR| R/W | [7] I2C_SLV1_RW [6:0] I2C_SLV1_ADDR|
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| <ul><li> -[ ] </li></ul>|[0x29] I2C_SLV1_REG| R/W | [7:0] I2C_SLV1_REG|
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| <ul><li> -[ ] </li></ul>|[0x2A] I2C_SLV1_CTRL| R/W | [7] I2C_SLV1_EN [6] I2C_SLV1_BYTE_SW [5] I2C_SLV1_REG_DIS [4] I2C_SLV1_GRP [3:0] I2C_SLV1_LEN|
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| <ul><li> -[ ] </li></ul>|[0x2B] I2C_SLV2_ADDR| R/W | [7] I2C_SLV2_RW [6:0] I2C_SLV2_ADDR|
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| <ul><li> -[ ] </li></ul>|[0x2C] I2C_SLV2_REG| R/W | [7:0] I2C_SLV2_REG|
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| <ul><li> -[ ] </li></ul>|[0x2D] I2C_SLV2_CTRL| R/W | [7] I2C_SLV2_EN [6] I2C_SLV2_BYTE_SW [5] I2C_SLV2_REG_DIS [4] I2C_SLV2_GRP [3:0] I2C_SLV2_LEN|
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| <ul><li> -[ ] </li></ul>|[0x2E] I2C_SLV3_ADDR| R/W | [7] I2C_SLV3_RW [6:0] I2C_SLV3_ADDR|
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| <ul><li> -[ ] </li></ul>|[0x2F] I2C_SLV3_REG| R/W | [7:0] I2C_SLV3_REG|
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| <ul><li> -[ ] </li></ul>|[0x30] I2C_SLV3_CTRL| R/W | [7] I2C_SLV3_EN [6] I2C_SLV3_BYTE_SW [5] I2C_SLV3_REG_DIS [4] I2C_SLV3_GRP [3:0] I2C_SLV3_LEN|
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| <ul><li> -[ ] </li></ul>|[0x31] I2C_SLV4_ADDR| R/W | [7] I2C_SLV4_RW [6:0] I2C_SLV4_ADDR|
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| <ul><li> -[ ] </li></ul>|[0x32] I2C_SLV4_REG| R/W | [7:0] I2C_SLV4_REG|
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| <ul><li> -[ ] </li></ul>|[0x33] I2C_SLV4_DO| R/W | [7:0] I2C_SLV4_DO|
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| <ul><li> -[ ] </li></ul>|[0x34] I2C_SLV4_CTRL| R/W | [7] I2C_SLV4_EN [6] I2C_SLV4_INT_EN [5] I2C_SLV4_REG_DIS [4:0] I2C_MST_DLY|
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| <ul><li> -[ ] </li></ul>|[0x35] I2C_SLV4_DI| R/W | [7:0] I2C_SLV4_DI|
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| <ul><li> -[ ] </li></ul>|[0x36] I2C_MST_STATUS| RO| [7] PASS_THROUGH [6] I2C_SLV4_DONE [5] I2C_LOST_ARB [4] I2C_SLV4_NACK [3] I2C_SLV3_NACK [2] I2C_SLV2_NACK [1] I2C_SLV1_NACK [0] I2C_SLV0_NACK|
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| <ul><li> -[ ] </li></ul>|[0x37] INT_PIN_CFG| R/W | [7] INT_LEVEL [6] INT_OPEN [5] LATCH_INT_EN [4] INT_RD_CLEAR [3] FSYNC_INT_LEVEL [2] FSYNC_INT_EN [1] I2C_BYPASS_EN [0] CLKOUT_EN|
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| <ul><li> -[ ] </li></ul>|[0x38] INT_ENABLE| R/W | [7] FF_EN [6] MOT_EN [5] ZMOT_EN [4] FIFO_OFLOW_EN [3] I2C_MST_INT_EN [2] PLL_RDY_INT_EN [1] DMP_INT_EN [0] RAW_RDY_EN|
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| <ul><li> -[ ] </li></ul>|[0x39] DMP_INT_STATUS| RO| [5] DMP_INT_5 [4] DMP_INT_4 [3] DMP_INT_3 [2] DMP_INT_2 [1] DMP_INT_1 [0] DMP_INT_0|
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| <ul><li> -[ ] </li></ul>|[0x3A] INT_STATUS| RO| [7] FF_INT [6] MOT_INT [5] ZMOT_INT [4] FIFO_OFLOW_INT [3] I2C_MST_INT [2] PLL_RDY_INT [1] DMP_INT [0] RAW_RDY_INT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x3B] ACCEL_XOUT_H| RO| [15:0] ACCEL_XOUT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x3C] ACCEL_XOUT_L| RO|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x3D] ACCEL_YOUT_H| RO| [15:0] ACCEL_YOUT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x3E] ACCEL_YOUT_L| RO|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x3F] ACCEL_ZOUT_H| RO| [15:0] ACCEL_ZOUT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x40] ACCEL_ZOUT_L| RO||
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x41] TEMP_OUT_H| RO| [15:0] TEMP_OUT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x42] TEMP_OUT_L| RO||
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x43] GYRO_XOUT_H| RO | [15:0] GYRO_XOUT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x44] GYRO_XOUT_L| RO||
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x45] GYRO_YOUT_H| RO| [15:0] GYRO_YOUT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x46] GYRO_YOUT_L| RO||
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x47] GYRO_ZOUT_H| RO| [15:0] GYRO_ZOUT|
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| <ul><li> -[x] Registers </li><li> -[x] API </li></ul>|[0x48] GYRO_ZOUT_L| RO||
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| <ul><li> -[ ] </ul></li>|[0x49] EXT_SENS_DATA_00| RO |[7:0] EXT_SENS_DATA_00|
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| <ul><li> -[ ] </ul></li>|[0x4A] EXT_SENS_DATA_01| RO |[7:0] EXT_SENS_DATA_01|
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| <ul><li> -[ ] </ul></li>|[0x4B] EXT_SENS_DATA_02| RO |[7:0] EXT_SENS_DATA_02|
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| <ul><li> -[ ] </ul></li>|[0x4C] EXT_SENS_DATA_03| RO |[7:0] EXT_SENS_DATA_03|
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| <ul><li> -[ ] </ul></li>|[0x4D] EXT_SENS_DATA_04| RO |[7:0] EXT_SENS_DATA_04|
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| <ul><li> -[ ] </ul></li>|[0x4E] EXT_SENS_DATA_05| RO |[7:0] EXT_SENS_DATA_05|
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| <ul><li> -[ ] </ul></li>|[0x4F] EXT_SENS_DATA_06| RO |[7:0] EXT_SENS_DATA_06|
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| <ul><li> -[ ] </ul></li>|[0x50] EXT_SENS_DATA_07| RO |[7:0] EXT_SENS_DATA_07|
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| <ul><li> -[ ] </ul></li>|[0x51] EXT_SENS_DATA_08| RO |[7:0] EXT_SENS_DATA_08|
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| <ul><li> -[ ] </ul></li>|[0x52] EXT_SENS_DATA_09| RO |[7:0] EXT_SENS_DATA_09|
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| <ul><li> -[ ] </li></ul>|[0x53] EXT_SENS_DATA_10| RO |[7:0] EXT_SENS_DATA_10|
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| <ul><li> -[ ] </li></ul>|[0x54] EXT_SENS_DATA_11| RO |[7:0] EXT_SENS_DATA_11|
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| <ul><li> -[ ] </li></ul>|[0x55] EXT_SENS_DATA_12| RO |[7:0] EXT_SENS_DATA_12|
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| <ul><li> -[ ] </li></ul>|[0x56] EXT_SENS_DATA_13| RO |[7:0] EXT_SENS_DATA_13|
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| <ul><li> -[ ] </li></ul>|[0x57] EXT_SENS_DATA_14| RO |[7:0] EXT_SENS_DATA_14|
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| <ul><li> -[ ] </li></ul>|[0x58] EXT_SENS_DATA_15| RO |[7:0] EXT_SENS_DATA_15|
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| <ul><li> -[ ] </li></ul>|[0x59] EXT_SENS_DATA_16| RO |[7:0] EXT_SENS_DATA_16|
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| <ul><li> -[ ] </li></ul>|[0x5A] EXT_SENS_DATA_17| RO |[7:0] EXT_SENS_DATA_17|
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| <ul><li> -[ ] </li></ul>|[0x5B] EXT_SENS_DATA_18| RO |[7:0] EXT_SENS_DATA_18|
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| <ul><li> -[ ] </li></ul>|[0x5C] EXT_SENS_DATA_19| RO |[7:0] EXT_SENS_DATA_19|
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| <ul><li> -[ ] </li></ul>|[0x5D] EXT_SENS_DATA_20| RO |[7:0] EXT_SENS_DATA_20|
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| <ul><li> -[ ] </li></ul>|[0x5E] EXT_SENS_DATA_21| RO |[7:0] EXT_SENS_DATA_21|
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| <ul><li> -[ ] </li></ul>|[0x5F] EXT_SENS_DATA_22| RO |[7:0] EXT_SENS_DATA_22|
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| <ul><li> -[ ] </li></ul>|[0x60] EXT_SENS_DATA_23| RO |[7:0] EXT_SENS_DATA_23|
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| <ul><li> -[ ] </li></ul>|[0x61] MOT_DETECT_STATUS| RO |[7] MOT_XNEG [6] MOT_XPOS [5] MOT_YNEG [4] MOT_YPOS [3] MOT_ZNEG [2] MOT_ZPOS [0] MOT_ZRMOT|
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| <ul><li> -[ ] </li></ul>|[0x63] I2C_SLV0_DO| R/W | [7:0] I2C_SLV0_DO|
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| <ul><li> -[ ] </li></ul>|[0x64] I2C_SLV1_DO| R/W | [7:0] I2C_SLV1_DO|
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| <ul><li> -[ ] </li></ul>|[0x65] I2C_SLV2_DO| R/W | [7:0] I2C_SLV2_DO|
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| <ul><li> -[ ] </li></ul>|[0x66] I2C_SLV3_DO| R/W | [7:0] I2C_SLV3_DO|
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| <ul><li> -[ ] </li></ul>|[0x67] I2C_MST_DELAY_CTRL| R/W | [7] DELAY_ES_SHADOW [4] I2C_SLV4_DLY_EN [3] I2C_SLV3_DLY_EN [2] I2C_SLV2_DLY_EN [1] I2C_SLV1_DLY_EN [0] I2C_SLV0_DLY_EN|
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| <ul><li> -[ ] </li></ul>|[0x68] SIGNAL_PATH_RESET| R/W | [2] GYRO_RESET [1] ACCEL_RESET [0] TEMP_RESET|
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| <ul><li> -[ ] </li></ul>|[0x69] MOT_DETECT_CTRL| R/W | [5:4] ACCEL_ON_DELAY [3:2] FF_COUNT [1:0] MOT_COUNT|
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| <ul><li> -[ ] </li></ul>|[0x6A] USER_CTRL| R/W | [7] DMP_EN [6] FIFO_EN [5] I2C_MST_EN [4] I2C_IF_DIS [3] DMP_RESET [2] FIFO_RESET [1] I2C_MST_RESET [0] SIG_COND_RESET|
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| <ul><li> -[ ] </li></ul>|[0x6B] PWR_MGMT_1| R/W | [7] DEVICE_RESET [6] SLEEP [5] CYCLE [3] TEMP_DIS [2:0] CLK_SEL|
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| <ul><li> -[x] Registers </li></ul>|[0x6C] PWR_MGMT_2| R/W | [7] LP_WAKE_CTRL [5] STBY_ZG [4] STBY_YA [3] STBY_ZA [2] STBY_XG [1] STBY_YG [0] STBY_ZG|
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| <ul><li> -[ ] </li></ul>|[0x6D] BANK_SEL| R/W | [6] PRFTCH_EN [5] CFG_USER_BANK [4:0] MEM_SEL|
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| <ul><li> -[ ] </li></ul>|[0x6E] MEM_START_ADDR| R/W | [7:0] START_ADDR|
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| <ul><li> -[ ] </li></ul>|[0x6F] MEM_R_W| R/W | [7:0] MEM_R_W|
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| <ul><li> -[ ] </li></ul>|[0x70] DMP_CFG_1| R/W | |
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| <ul><li> -[ ] </li></ul>|[0x71] DMP_CFG_2| R/W | |
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| <ul><li> -[ ] </li></ul>|[0x72] FIFO_COUNTH| R/W | [15:0] FIFO_COUNT|
|
||||
| <ul><li> -[ ] </li></ul>|[0x73] FIFO_COUNTL| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>|[0x74] FIFO_R_W| R/W | [7:0] FIFO_R_W|
|
||||
| <ul><li> -[x] Registers </li></ul>|[0x75] WHO_AM_I| RO | [6:1] WHO_AM_I |
|
||||
|in Register Map|API|Register|Access|Bits|
|
||||
|:-----|:---:|:------:|:-----:|---:|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x00] AUX_VDDIO| R/W | [7] AUX_VDDIO [6:1] XG_OFFS_TC [0] OTP_BNK_VLD|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x01] YG_OFFS_TC| R/W | [6:1] YG_OFFS_TC|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x02] ZG_OFFS_TC| R/W | [6:1] ZG_OFFS_TC|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x03] X_FINE_GAIN| R/W | [7:0] X_FINE_GAIN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x04] Y_FINE_GAIN| R/W | [7:0] Y_FINE_GAIN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x05] Z_FINE_GAIN| R/W | [7:0] Z_FINE_GAIN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x06] XA_OFFS_H| R/W | [15:0] XA_OFFS|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x07] XA_OFFS_L_TC| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x08] YA_OFFS_H| R/W | [15:0] YA_OFFS|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x09] YA_OFFS_L_TC| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x0A] ZA_OFFS_H| R/W | [15:0] ZA_OFFS|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x0B] ZA_OFFS_L_TC| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x13] XG_OFFS_USRH| R/W | [15:0] XG_OFFS_USR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x14] XG_OFFS_USRL| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x15] YG_OFFS_USRH| R/W | [15:0] YG_OFFS_USR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x16] YG_OFFS_USRL| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x17] ZG_OFFS_USRH| R/W | [15:0] ZG_OFFS_USR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x18] ZG_OFFS_USRL| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x19] SMPLRT_DIV| R/W | [7:0] SMPLRT_DIV|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x1A] CONFIG| R/W | [5:3] EXT_SYNC_SET [2:0] DLPF_CFG|
|
||||
| <ul><li> -[x] </li></ul>|<ul><li> -[x] </li></ul>|[0x1B] GYRO_CONFIG| R/W | [7] XG_ST [6] YG_ST [5] ZG_ST [4:3] FS_SEL|
|
||||
| <ul><li> -[x] </li></ul>|<ul><li> -[x] </li></ul>|[0x1C] ACCEL_CONFIG| R/W | [7] XA_ST [6] YA_ST [5] ZA_ST [4:3] AFS_SEL [2:0] ACCEL_HPF|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x1D] FF_THR| R/W | [7:0] FF_THR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x1E] FF_DUR| R/W | [7:0] FF_DUR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x1F] MOT_THR| R/W | [7:0] MOT_THR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x20] MOT_DUR| R/W | [7:0] MOT_DUR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x21] ZRMOT_THR| R/W | [7:0] ZRMOT_THR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x22] ZRMOT_DUR| R/W | [7:0] ZRMOT_DUR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x23] FIFO_EN| R/W | [7] TEMP_FIFO_EN [6] XG_FIFO_EN [5] YG_FIFO_EN [4] ZG_FIFO_EN [3] ACCEL_FIFO_EN [2] SLV2_FIFO_EN [1] SLV1_FIFO_EN [0] SLV0_FIFO_EN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x24] I2C_MST_CTRL| R/W | [7] MULT_MST_EN [6] WAIT_FOR_ES [5] SLV_3_FIFO_EN [4] I2C_MST_P_NSR [3:0] I2C_MST_CLK|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x25] I2C_SLV0_ADDR| R/W | [7] I2C_SLV0_RW [6:0] I2C_SLV0_ADDR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x26] I2C_SLV0_REG| R/W | [7:0] I2C_SLV0_REG|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x27] I2C_SLV0_CTRL| R/W | [7] I2C_SLV0_EN [6] I2C_SLV0_BYTE_SW [5] I2C_SLV0_REG_DIS [4] I2C_SLV0_GRP [3:0] I2C_SLV0_LEN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x28] I2C_SLV1_ADDR| R/W | [7] I2C_SLV1_RW [6:0] I2C_SLV1_ADDR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x29] I2C_SLV1_REG| R/W | [7:0] I2C_SLV1_REG|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x2A] I2C_SLV1_CTRL| R/W | [7] I2C_SLV1_EN [6] I2C_SLV1_BYTE_SW [5] I2C_SLV1_REG_DIS [4] I2C_SLV1_GRP [3:0] I2C_SLV1_LEN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x2B] I2C_SLV2_ADDR| R/W | [7] I2C_SLV2_RW [6:0] I2C_SLV2_ADDR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x2C] I2C_SLV2_REG| R/W | [7:0] I2C_SLV2_REG|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x2D] I2C_SLV2_CTRL| R/W | [7] I2C_SLV2_EN [6] I2C_SLV2_BYTE_SW [5] I2C_SLV2_REG_DIS [4] I2C_SLV2_GRP [3:0] I2C_SLV2_LEN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x2E] I2C_SLV3_ADDR| R/W | [7] I2C_SLV3_RW [6:0] I2C_SLV3_ADDR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x2F] I2C_SLV3_REG| R/W | [7:0] I2C_SLV3_REG|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x30] I2C_SLV3_CTRL| R/W | [7] I2C_SLV3_EN [6] I2C_SLV3_BYTE_SW [5] I2C_SLV3_REG_DIS [4] I2C_SLV3_GRP [3:0] I2C_SLV3_LEN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x31] I2C_SLV4_ADDR| R/W | [7] I2C_SLV4_RW [6:0] I2C_SLV4_ADDR|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x32] I2C_SLV4_REG| R/W | [7:0] I2C_SLV4_REG|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x33] I2C_SLV4_DO| R/W | [7:0] I2C_SLV4_DO|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x34] I2C_SLV4_CTRL| R/W | [7] I2C_SLV4_EN [6] I2C_SLV4_INT_EN [5] I2C_SLV4_REG_DIS [4:0] I2C_MST_DLY|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x35] I2C_SLV4_DI| R/W | [7:0] I2C_SLV4_DI|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x36] I2C_MST_STATUS| RO| [7] PASS_THROUGH [6] I2C_SLV4_DONE [5] I2C_LOST_ARB [4] I2C_SLV4_NACK [3] I2C_SLV3_NACK [2] I2C_SLV2_NACK [1] I2C_SLV1_NACK [0] I2C_SLV0_NACK|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x37] INT_PIN_CFG| R/W | [7] INT_LEVEL [6] INT_OPEN [5] LATCH_INT_EN [4] INT_RD_CLEAR [3] FSYNC_INT_LEVEL [2] FSYNC_INT_EN [1] I2C_BYPASS_EN [0] CLKOUT_EN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x38] INT_ENABLE| R/W | [7] FF_EN [6] MOT_EN [5] ZMOT_EN [4] FIFO_OFLOW_EN [3] I2C_MST_INT_EN [2] PLL_RDY_INT_EN [1] DMP_INT_EN [0] RAW_RDY_EN|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x39] DMP_INT_STATUS| RO| [5] DMP_INT_5 [4] DMP_INT_4 [3] DMP_INT_3 [2] DMP_INT_2 [1] DMP_INT_1 [0] DMP_INT_0|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x3A] INT_STATUS| RO| [7] FF_INT [6] MOT_INT [5] ZMOT_INT [4] FIFO_OFLOW_INT [3] I2C_MST_INT [2] PLL_RDY_INT [1] DMP_INT [0] RAW_RDY_INT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x3B] ACCEL_XOUT_H| RO| [15:0] ACCEL_XOUT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x3C] ACCEL_XOUT_L| RO|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x3D] ACCEL_YOUT_H| RO| [15:0] ACCEL_YOUT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x3E] ACCEL_YOUT_L| RO|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x3F] ACCEL_ZOUT_H| RO| [15:0] ACCEL_ZOUT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x40] ACCEL_ZOUT_L| RO||
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x41] TEMP_OUT_H| RO| [15:0] TEMP_OUT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x42] TEMP_OUT_L| RO||
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x43] GYRO_XOUT_H| RO | [15:0] GYRO_XOUT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x44] GYRO_XOUT_L| RO||
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x45] GYRO_YOUT_H| RO| [15:0] GYRO_YOUT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x46] GYRO_YOUT_L| RO||
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x47] GYRO_ZOUT_H| RO| [15:0] GYRO_ZOUT|
|
||||
| <ul><li> -[x] </li><li> -[x] </li></ul>|[0x48] GYRO_ZOUT_L| RO||
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x49] EXT_SENS_DATA_00| RO |[7:0] EXT_SENS_DATA_00|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x4A] EXT_SENS_DATA_01| RO |[7:0] EXT_SENS_DATA_01|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x4B] EXT_SENS_DATA_02| RO |[7:0] EXT_SENS_DATA_02|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x4C] EXT_SENS_DATA_03| RO |[7:0] EXT_SENS_DATA_03|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x4D] EXT_SENS_DATA_04| RO |[7:0] EXT_SENS_DATA_04|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x4E] EXT_SENS_DATA_05| RO |[7:0] EXT_SENS_DATA_05|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x4F] EXT_SENS_DATA_06| RO |[7:0] EXT_SENS_DATA_06|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x50] EXT_SENS_DATA_07| RO |[7:0] EXT_SENS_DATA_07|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x51] EXT_SENS_DATA_08| RO |[7:0] EXT_SENS_DATA_08|
|
||||
| <ul><li> -[ ] </ul></li>|<ul><li> -[ ] </li></ul>|[0x52] EXT_SENS_DATA_09| RO |[7:0] EXT_SENS_DATA_09|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x53] EXT_SENS_DATA_10| RO |[7:0] EXT_SENS_DATA_10|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x54] EXT_SENS_DATA_11| RO |[7:0] EXT_SENS_DATA_11|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x55] EXT_SENS_DATA_12| RO |[7:0] EXT_SENS_DATA_12|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x56] EXT_SENS_DATA_13| RO |[7:0] EXT_SENS_DATA_13|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x57] EXT_SENS_DATA_14| RO |[7:0] EXT_SENS_DATA_14|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x58] EXT_SENS_DATA_15| RO |[7:0] EXT_SENS_DATA_15|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x59] EXT_SENS_DATA_16| RO |[7:0] EXT_SENS_DATA_16|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x5A] EXT_SENS_DATA_17| RO |[7:0] EXT_SENS_DATA_17|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x5B] EXT_SENS_DATA_18| RO |[7:0] EXT_SENS_DATA_18|
|
||||
| <ul><li> -[ ] </li></ul>|<ul><li> -[ ] </li></ul>|[0x5C] EXT_SENS_DATA_19| RO |[7:0] EXT_SENS_DATA_19|
|
||||
| <ul><li> -[ ] </li></ul>||[0x5D] EXT_SENS_DATA_20| RO |[7:0] EXT_SENS_DATA_20|
|
||||
| <ul><li> -[ ] </li></ul>||[0x5E] EXT_SENS_DATA_21| RO |[7:0] EXT_SENS_DATA_21|
|
||||
| <ul><li> -[ ] </li></ul>||[0x5F] EXT_SENS_DATA_22| RO |[7:0] EXT_SENS_DATA_22|
|
||||
| <ul><li> -[ ] </li></ul>||[0x60] EXT_SENS_DATA_23| RO |[7:0] EXT_SENS_DATA_23|
|
||||
| <ul><li> -[ ] </li></ul>||[0x61] MOT_DETECT_STATUS| RO |[7] MOT_XNEG [6] MOT_XPOS [5] MOT_YNEG [4] MOT_YPOS [3] MOT_ZNEG [2] MOT_ZPOS [0] MOT_ZRMOT|
|
||||
| <ul><li> -[ ] </li></ul>||[0x63] I2C_SLV0_DO| R/W | [7:0] I2C_SLV0_DO|
|
||||
| <ul><li> -[ ] </li></ul>||[0x64] I2C_SLV1_DO| R/W | [7:0] I2C_SLV1_DO|
|
||||
| <ul><li> -[ ] </li></ul>||[0x65] I2C_SLV2_DO| R/W | [7:0] I2C_SLV2_DO|
|
||||
| <ul><li> -[ ] </li></ul>||[0x66] I2C_SLV3_DO| R/W | [7:0] I2C_SLV3_DO|
|
||||
| <ul><li> -[ ] </li></ul>||[0x67] I2C_MST_DELAY_CTRL| R/W | [7] DELAY_ES_SHADOW [4] I2C_SLV4_DLY_EN [3] I2C_SLV3_DLY_EN [2] I2C_SLV2_DLY_EN [1] I2C_SLV1_DLY_EN [0] I2C_SLV0_DLY_EN|
|
||||
| <ul><li> -[ ] </li></ul>||[0x68] SIGNAL_PATH_RESET| R/W | [2] GYRO_RESET [1] ACCEL_RESET [0] TEMP_RESET|
|
||||
| <ul><li> -[ ] </li></ul>||[0x69] MOT_DETECT_CTRL| R/W | [5:4] ACCEL_ON_DELAY [3:2] FF_COUNT [1:0] MOT_COUNT|
|
||||
| <ul><li> -[ ] </li></ul>||[0x6A] USER_CTRL| R/W | [7] DMP_EN [6] FIFO_EN [5] I2C_MST_EN [4] I2C_IF_DIS [3] DMP_RESET [2] FIFO_RESET [1] I2C_MST_RESET [0] SIG_COND_RESET|
|
||||
| <ul><li> -[ ] </li></ul>||[0x6B] PWR_MGMT_1| R/W | [7] DEVICE_RESET [6] SLEEP [5] CYCLE [3] TEMP_DIS [2:0] CLK_SEL|
|
||||
| <ul><li> -[x] </li></ul>|<ul><li> -[ ] </li></ul>|[0x6C] PWR_MGMT_2| R/W | [7] LP_WAKE_CTRL [5] STBY_ZG [4] STBY_YA [3] STBY_ZA [2] STBY_XG [1] STBY_YG [0] STBY_ZG|
|
||||
| <ul><li> -[ ] </li></ul>||[0x6D] BANK_SEL| R/W | [6] PRFTCH_EN [5] CFG_USER_BANK [4:0] MEM_SEL|
|
||||
| <ul><li> -[ ] </li></ul>||[0x6E] MEM_START_ADDR| R/W | [7:0] START_ADDR|
|
||||
| <ul><li> -[ ] </li></ul>||[0x6F] MEM_R_W| R/W | [7:0] MEM_R_W|
|
||||
| <ul><li> -[ ] </li></ul>||[0x70] DMP_CFG_1| R/W | |
|
||||
| <ul><li> -[ ] </li></ul>||[0x71] DMP_CFG_2| R/W | |
|
||||
| <ul><li> -[ ] </li></ul>||[0x72] FIFO_COUNTH| R/W | [15:0] FIFO_COUNT|
|
||||
| <ul><li> -[ ] </li></ul>||[0x73] FIFO_COUNTL| R/W ||
|
||||
| <ul><li> -[ ] </li></ul>||[0x74] FIFO_R_W| R/W | [7:0] FIFO_R_W|
|
||||
| <ul><li> -[x] </li></ul>|<ul><li> -[ ] </li></ul>|[0x75] WHO_AM_I| RO | [6:1] WHO_AM_I |
|
||||
|
|
|
|||
15
src/bits.rs
15
src/bits.rs
|
|
@ -74,6 +74,14 @@ mod tests {
|
|||
assert_eq!(get_bit(4, 2), 1);
|
||||
assert_eq!(get_bit(4, 1), 0);
|
||||
assert_eq!(get_bit(4, 0), 0);
|
||||
assert_eq!(get_bit(12, 3), 1);
|
||||
assert_eq!(get_bit(12, 2), 1);
|
||||
assert_eq!(get_bit(12, 1), 0);
|
||||
assert_eq!(get_bit(12, 1), 0);
|
||||
assert_eq!(get_bit(8, 3), 1);
|
||||
assert_eq!(get_bit(8, 2), 0);
|
||||
assert_eq!(get_bit(8, 1), 0);
|
||||
assert_eq!(get_bit(8, 0), 0);
|
||||
}
|
||||
|
||||
#[test]
|
||||
|
|
@ -91,6 +99,13 @@ mod tests {
|
|||
// enable bit 3
|
||||
set_bit(&mut byte[0], 3, true);
|
||||
assert_eq!(byte[0], 12);
|
||||
|
||||
byte = ((1 << 7) as u8).to_be_bytes();
|
||||
set_bit(&mut byte[0], 7, false);
|
||||
assert_eq!(byte[0], 0);
|
||||
|
||||
set_bit(&mut byte[0], 7, true);
|
||||
assert_eq!(byte[0], (1 << 7) as u8);
|
||||
}
|
||||
|
||||
#[test]
|
||||
|
|
|
|||
|
|
@ -4,9 +4,27 @@
|
|||
//!
|
||||
|
||||
/// Gyro Sensitivity
|
||||
///
|
||||
/// Measurements are scaled like this:
|
||||
/// x * range/2**(resolution-1) or x / (2**(resolution-1) / range)
|
||||
/// Sources:
|
||||
/// * https://www.nxp.com/docs/en/application-note/AN3461.pdf
|
||||
/// * https://theccontinuum.com/2012/09/24/arduino-imu-pitch-roll-from-accelerometer/
|
||||
/// * https://makersportal.com/blog/2019/8/17/arduino-mpu6050-high-frequency-accelerometer-and-gyroscope-data-saver#accel_test
|
||||
/// * https://github.com/kriswiner/MPU6050/wiki/2014-Invensense-Developer%27s-Conference
|
||||
/// * rust MPU9250 driver on github
|
||||
pub const GYRO_SENS: (f32, f32, f32, f32) = (131., 65.5, 32.8, 16.4);
|
||||
|
||||
/// Accelerometer Sensitivity
|
||||
///
|
||||
/// Measurements are scaled like this:
|
||||
/// x * range/2**(resolution-1) or x / (2**(resolution-1) / range)
|
||||
/// Sources:
|
||||
/// * https://www.nxp.com/docs/en/application-note/AN3461.pdf
|
||||
/// * https://theccontinuum.com/2012/09/24/arduino-imu-pitch-roll-from-accelerometer/
|
||||
/// * https://makersportal.com/blog/2019/8/17/arduino-mpu6050-high-frequency-accelerometer-and-gyroscope-data-saver#accel_test
|
||||
/// * https://github.com/kriswiner/MPU6050/wiki/2014-Invensense-Developer%27s-Conference
|
||||
/// * rust MPU9250 driver on github
|
||||
pub const ACCEL_SENS: (f32, f32, f32, f32) = (16384., 8192., 4096., 2048.);
|
||||
|
||||
/// Temperature Offset
|
||||
|
|
@ -15,6 +33,15 @@ pub const TEMP_OFFSET: f32 = 36.53;
|
|||
/// Temperature Sensitivity
|
||||
pub const TEMP_SENSITIVITY: f32 = 340.;
|
||||
|
||||
#[allow(non_camel_case_types)]
|
||||
#[derive(Copy, Clone, Debug)]
|
||||
pub struct Specs;
|
||||
|
||||
impl Specs {
|
||||
// pub const ACCEL_SELF_TEST_MIN: u8 = -14;
|
||||
pub const ACCEL_SELF_TEST_MAX: u8 = 14;
|
||||
}
|
||||
|
||||
#[allow(non_camel_case_types)]
|
||||
#[derive(Copy, Clone, Debug)]
|
||||
/// Register addresses
|
||||
|
|
@ -47,12 +74,31 @@ pub enum Registers {
|
|||
GYRO_CONFIG = 0x1b,
|
||||
}
|
||||
|
||||
pub struct BitBlock {
|
||||
start_bit: u8,
|
||||
length: u8
|
||||
}
|
||||
|
||||
impl Registers {
|
||||
pub fn addr(&self) -> u8 {
|
||||
*self as u8
|
||||
}
|
||||
}
|
||||
|
||||
#[allow(non_camel_case_types)]
|
||||
#[derive(Copy, Clone, Debug)]
|
||||
/// Register 107: Power Management
|
||||
pub struct PWR_MGMT_1;
|
||||
|
||||
impl PWR_MGMT_1 {
|
||||
pub const ADDR: u8 = 0x6b;
|
||||
pub const DEVICE_RESET: u8 = 7;
|
||||
pub const SLEEP: u8 = 6;
|
||||
pub const CYCLE: u8 = 5;
|
||||
pub const TEMP_DIS: u8 = 3;
|
||||
pub const CLKSEL: BitBlock = BitBlock { start_bit: 2, length: 3 };
|
||||
}
|
||||
|
||||
#[allow(non_camel_case_types)]
|
||||
#[derive(Copy, Clone, Debug)]
|
||||
pub struct Bits;
|
||||
|
|
@ -62,12 +108,23 @@ impl Bits {
|
|||
/// Accelerometer high pass filter bit: See 4.5 Register 28
|
||||
pub const ACCEL_HPF_BIT: u8 = 3;
|
||||
|
||||
/// Gyro x axis self test bit
|
||||
pub const GYRO_CONFIG_XG_ST: u8 = 7;
|
||||
/// Gyro y axis self test bit
|
||||
pub const GYRO_CONFIG_YG_ST: u8 = 6;
|
||||
/// Gyro z axis self test bit
|
||||
pub const GYRO_CONFIG_ZG_ST: u8 = 5;
|
||||
/// Gyro Config FS_SEL start bit
|
||||
pub const GYRO_CONFIG_FS_SEL_BIT: u8 = 4;
|
||||
/// Gyro Config FS_SEL length
|
||||
pub const GYRO_CONFIG_FS_SEL_LENGTH: u8 = 3;
|
||||
|
||||
|
||||
/// Accel x axis self test bit
|
||||
pub const ACCEL_CONFIG_XA_ST: u8 = 7;
|
||||
/// Accel y axis self test bit
|
||||
pub const ACCEL_CONFIG_YA_ST: u8 = 6;
|
||||
/// Accel z axis self test bit
|
||||
pub const ACCEL_CONFIG_ZA_ST: u8 = 5;
|
||||
/// Accel Config FS_SEL start bit
|
||||
pub const ACCEL_CONFIG_FS_SEL_BIT: u8 = 4;
|
||||
/// Accel Config FS_SEL length
|
||||
|
|
|
|||
61
src/lib.rs
61
src/lib.rs
|
|
@ -184,8 +184,67 @@ where
|
|||
Ok(GyroRange::from(byte))
|
||||
}
|
||||
|
||||
/// reset device
|
||||
pub fn reset_device<D: DelayMs<u8>>(&mut self, delay: &mut D) -> Result<(), Mpu6050Error<E>> {
|
||||
self.write_bit(PWR_MGMT_1::ADDR, PWR_MGMT_1::DEVICE_RESET, true)?;
|
||||
delay.delay_ms(100u8);
|
||||
// Note: Reset sets sleep to true! Section register map: resets PWR_MGMT to 0x40
|
||||
Ok(())
|
||||
}
|
||||
|
||||
/// enable, disable sleep of sensor
|
||||
pub fn set_sleep_enabled(&mut self, enable: bool) -> Result<(), Mpu6050Error<E>> {
|
||||
Ok(self.write_bit(PWR_MGMT_1::ADDR, PWR_MGMT_1::SLEEP, enable)?)
|
||||
}
|
||||
|
||||
/// get sleep status
|
||||
pub fn get_sleep_enabled(&mut self) -> Result<bool, Mpu6050Error<E>> {
|
||||
Ok(self.read_bit(PWR_MGMT_1::ADDR, PWR_MGMT_1::SLEEP)? != 0)
|
||||
}
|
||||
|
||||
/// enable, disable temperature measurement of sensor
|
||||
pub fn set_temp_enabled(&mut self, enable: bool) -> Result<(), Mpu6050Error<E>> {
|
||||
Ok(self.write_bit(PWR_MGMT_1::ADDR, PWR_MGMT_1::TEMP_DIS, enable)?)
|
||||
}
|
||||
|
||||
/// get temperature sensor status
|
||||
pub fn get_temp_enabled(&mut self) -> Result<bool, Mpu6050Error<E>> {
|
||||
Ok(self.read_bit(PWR_MGMT_1::ADDR, PWR_MGMT_1::TEMP_DIS)? != 0)
|
||||
}
|
||||
|
||||
/// set accel x self test
|
||||
pub fn set_accel_x_self_test(&mut self, enable: bool) -> Result<(), Mpu6050Error<E>> {
|
||||
Ok(self.write_bit(ACCEL_CONFIG.addr(), Bits::ACCEL_CONFIG_XA_ST, enable)?)
|
||||
}
|
||||
|
||||
/// get accel x self test
|
||||
pub fn get_accel_x_self_test(&mut self) -> Result<bool, Mpu6050Error<E>> {
|
||||
Ok(self.read_bit(ACCEL_CONFIG.addr(), Bits::ACCEL_CONFIG_XA_ST)? != 0)
|
||||
}
|
||||
|
||||
/// set accel y self test
|
||||
pub fn set_accel_y_self_test(&mut self, enable: bool) -> Result<(), Mpu6050Error<E>> {
|
||||
Ok(self.write_bit(ACCEL_CONFIG.addr(), Bits::ACCEL_CONFIG_YA_ST, enable)?)
|
||||
}
|
||||
|
||||
/// get accel y self test
|
||||
pub fn get_accel_y_self_test(&mut self) -> Result<bool, Mpu6050Error<E>> {
|
||||
Ok(self.read_bit(ACCEL_CONFIG.addr(), Bits::ACCEL_CONFIG_YA_ST)? != 0)
|
||||
}
|
||||
|
||||
/// set accel z self test
|
||||
pub fn set_accel_z_self_test(&mut self, enable: bool) -> Result<(), Mpu6050Error<E>> {
|
||||
Ok(self.write_bit(ACCEL_CONFIG.addr(), Bits::ACCEL_CONFIG_ZA_ST, enable)?)
|
||||
}
|
||||
|
||||
/// get accel z self test
|
||||
pub fn get_accel_z_self_test(&mut self) -> Result<bool, Mpu6050Error<E>> {
|
||||
Ok(self.read_bit(ACCEL_CONFIG.addr(), Bits::ACCEL_CONFIG_ZA_ST)? != 0)
|
||||
}
|
||||
|
||||
/// Roll and pitch estimation from raw accelerometer readings
|
||||
/// NOTE: no yaw! no magnetometer present on MPU6050
|
||||
/// https://www.nxp.com/docs/en/application-note/AN3461.pdf equation 28, 29
|
||||
pub fn get_acc_angles(&mut self) -> Result<Vector2<f32>, Mpu6050Error<E>> {
|
||||
let acc = self.get_acc()?;
|
||||
|
||||
|
|
@ -221,7 +280,7 @@ where
|
|||
))
|
||||
}
|
||||
|
||||
/// Accelerometer readings in m/s^2
|
||||
/// Accelerometer readings in g
|
||||
pub fn get_acc(&mut self) -> Result<Vector3<f32>, Mpu6050Error<E>> {
|
||||
let mut acc = self.read_rot(ACC_REGX_H.addr())?;
|
||||
acc /= self.acc_sensitivity;
|
||||
|
|
|
|||
Loading…
Reference in a new issue