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8 commits

Author SHA1 Message Date
b73ed71bc2
trigger interrupt
why don't the docs make it apparrent that this is possible, yet alone required?
2025-03-27 11:22:28 -04:00
e557701ab7
switch to correct interrupt vector 2025-03-27 11:00:27 -04:00
d7b7ebc185
don't bit-band 2025-03-27 10:49:39 -04:00
aca9fc79ac
add sampling.h 2025-03-27 10:41:57 -04:00
1d2833a282
add includes 2025-03-27 10:37:54 -04:00
ac0bd4fc33
read adc registers 2025-03-27 10:31:30 -04:00
1482a29a0f
create sampling.c 2025-03-27 10:13:35 -04:00
09cce163fc
pwm out 2025-03-24 17:28:33 -04:00
4 changed files with 115 additions and 3 deletions

36
main.c
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@ -16,14 +16,46 @@
#include "Crystalfontz128x128_ST7735.h"
#include <stdio.h>
#include "buttons.h"
#include "sampling.h"
#include <math.h>
#include "inc/hw_memmap.h"
#include "driverlib/gpio.h"
#include "driverlib/pwm.h"
#include "driverlib/pin_map.h"
#define PWM_FREQUENCY 20000 // PWM frequency = 20 kHz
uint32_t gSystemClock; // [Hz] system clock frequency
volatile uint32_t gTime = 0; // time in hundredths of a second
int main(void)
{
// start a pwm test signal
void start_signal() {
// configure M0PWM2, at GPIO PF2, BoosterPack 1 header C1 pin 2
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypePWM(GPIO_PORTF_BASE, GPIO_PIN_2);
GPIOPinConfigure(GPIO_PF2_M0PWM2);
GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_STRENGTH_2MA,
GPIO_PIN_TYPE_STD);
// configure the PWM0 peripheral, gen 1, outputs 2 and 3
SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM0);
// use system clock without division
PWMClockSet(PWM0_BASE, PWM_SYSCLK_DIV_1);
PWMGenConfigure(PWM0_BASE, PWM_GEN_1,
PWM_GEN_MODE_DOWN | PWM_GEN_MODE_NO_SYNC);
PWMGenPeriodSet(PWM0_BASE, PWM_GEN_1,
roundf((float)gSystemClock / PWM_FREQUENCY));
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_2,
roundf((float)gSystemClock / PWM_FREQUENCY * 0.4f));
PWMOutputState(PWM0_BASE, PWM_OUT_2_BIT, true);
PWMGenEnable(PWM0_BASE, PWM_GEN_1);
}
int main(void) {
IntMasterDisable();
start_signal();
start_sampler();
// Enable the Floating Point Unit, and permit ISRs to use it
FPUEnable();
FPULazyStackingEnable();

68
sampling.c Normal file
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@ -0,0 +1,68 @@
#include <stdint.h>
#include <stdbool.h>
#include "inc/tm4c1294ncpdt.h"
#include "driverlib/adc.h"
#include "driverlib/pin_map.h"
#include "driverlib/gpio.h"
#include "driverlib/sysctl.h"
#include "driverlib/interrupt.h"
#include "sysctl_pll.h"
#include "inc/hw_types.h"
#include "inc/hw_memmap.h"
#include <math.h>
#include "buttons.h"
#include "sampling.h"
// index wrapping macro
#define ADC_BUFFER_WRAP(i) ((i) & (ADC_BUFFER_SIZE - 1))
// latest sample index
volatile int32_t gADCBufferIndex = ADC_BUFFER_SIZE - 1;
volatile uint16_t gADCBuffer[ADC_BUFFER_SIZE]; // circular buffer
volatile uint32_t gADCErrors = 0; // number of missed ADC deadlines
void ADC_ISR(void)
{
// clear ADC1 sequence0 interrupt flag in the ADCISC register
//HWREGBITW(ADC1_ISC_R, 1) = 1;
ADC1_ISC_R |= 1;
// check for ADC FIFO overflow
if(ADC1_OSTAT_R & ADC_OSTAT_OV0) {
gADCErrors++; // count errors
ADC1_OSTAT_R = ADC_OSTAT_OV0; // clear overflow condition
}
gADCBufferIndex = ADC_BUFFER_WRAP(gADCBufferIndex + 1);
// read sample from the ADC1 sequence 0 FIFO
gADCBuffer[gADCBufferIndex] = (ADC1_SSFIFO0_R & ADC_SSFIFO0_DATA_M);
}
void start_sampler() {
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOE);
GPIOPinTypeADC(GPIO_PORTE_BASE,
GPIO_PIN_0); // GPIO setup for analog input AIN3
// initialize ADC peripherals
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_ADC1);
// ADC clock
uint32_t pll_frequency = SysCtlFrequencyGet(CRYSTAL_FREQUENCY);
uint32_t pll_divisor =
(pll_frequency - 1) / (16 * ADC_SAMPLING_RATE) + 1; // round up
ADCClockConfigSet(ADC0_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL,
pll_divisor);
ADCClockConfigSet(ADC1_BASE, ADC_CLOCK_SRC_PLL | ADC_CLOCK_RATE_FULL,
pll_divisor);
// choose ADC1 sequence 0; disable before configuring
ADCSequenceDisable(ADC1_BASE, 0);
ADCSequenceConfigure(ADC1_BASE, 0, ADC_TRIGGER_ALWAYS,
0); // specify the "Always" trigger
// in the 0th step, sample channel 3 (AIN3)
// enable interrupt, and make it the end of sequence
ADCSequenceStepConfigure(ADC1_BASE, 0, 0, ADC_CTL_CH3 | ADC_CTL_END | ADC_CTL_IE);
// enable the sequence. it is now sampling
ADCSequenceEnable(ADC1_BASE, 0);
// enable sequence 0 interrupt in the ADC1 peripheral
ADCIntEnable(ADC1_BASE, 0); // INT_ADC1SS0
IntPrioritySet(INT_ADC1SS0, 0); // set ADC1 sequence 0 interrupt priority
// enable ADC1 sequence 0 interrupt in int. controller
IntEnable(INT_ADC1SS0);
}

11
sampling.h Normal file
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@ -0,0 +1,11 @@
#ifndef SAMPLING_H_
#define SAMPLING_H_
#include <stdint.h>
#define ADC_BUFFER_SIZE 2048 // size must be a power of 2
// initialize ADC and ISR
void start_sampler(void);
#endif /* SAMPLING_H_ */

View file

@ -34,6 +34,7 @@ static void NmiSR(void);
static void FaultISR(void);
static void IntDefaultHandler(void);
void ButtonISR(void);
void ADC_ISR(void);
//*****************************************************************************
//
@ -131,7 +132,7 @@ void (* const g_pfnVectors[])(void) =
IntDefaultHandler, // PWM Generator 3
IntDefaultHandler, // uDMA Software Transfer
IntDefaultHandler, // uDMA Error
IntDefaultHandler, // ADC1 Sequence 0
ADC_ISR, // ADC1 Sequence 0
IntDefaultHandler, // ADC1 Sequence 1
IntDefaultHandler, // ADC1 Sequence 2
IntDefaultHandler, // ADC1 Sequence 3