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trigger interrupt

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why don't the docs make it apparrent that this is possible, yet alone required?
This commit is contained in:
Andy Killorin 2025-03-27 11:22:28 -04:00
parent e557701ab7
commit b73ed71bc2
Signed by: ank
GPG key ID: 23F9463ECB67FE8C
1 changed files with 3 additions and 3 deletions
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6
sampling.c
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@ -57,11 +57,11 @@ void start_sampler() {
0); // specify the "Always" trigger 0); // specify the "Always" trigger
// in the 0th step, sample channel 3 (AIN3) // in the 0th step, sample channel 3 (AIN3)
// enable interrupt, and make it the end of sequence // enable interrupt, and make it the end of sequence
ADCSequenceStepConfigure(ADC1_BASE, 0, 0, ADC_CTL_CH3); ADCSequenceStepConfigure(ADC1_BASE, 0, 0, ADC_CTL_CH3 | ADC_CTL_END | ADC_CTL_IE);
// enable the sequence. it is now sampling // enable the sequence. it is now sampling
ADCSequenceEnable(ADC0_BASE, 0); ADCSequenceEnable(ADC1_BASE, 0);
// enable sequence 0 interrupt in the ADC1 peripheral // enable sequence 0 interrupt in the ADC1 peripheral
ADCIntEnable(ADC1_BASE, INT_ADC1SS0); ADCIntEnable(ADC1_BASE, 0); // INT_ADC1SS0
IntPrioritySet(INT_ADC1SS0, 0); // set ADC1 sequence 0 interrupt priority IntPrioritySet(INT_ADC1SS0, 0); // set ADC1 sequence 0 interrupt priority
// enable ADC1 sequence 0 interrupt in int. controller // enable ADC1 sequence 0 interrupt in int. controller
IntEnable(INT_ADC1SS0); IntEnable(INT_ADC1SS0);