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second PWM output on PF3

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Killorin 2025-04-24 11:19:50 -04:00
parent 92e1128e5a
commit ad661c5c03
1 changed files with 6 additions and 3 deletions
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9
main.c
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@ -96,9 +96,10 @@ int Trigger(bool rising);
void start_signal() {
// configure M0PWM2, at GPIO PF2, BoosterPack 1 header C1 pin 2
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIOPinTypePWM(GPIO_PORTF_BASE, GPIO_PIN_2);
GPIOPinTypePWM(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3);
GPIOPinConfigure(GPIO_PF2_M0PWM2);
GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_2, GPIO_STRENGTH_2MA,
GPIOPinConfigure(GPIO_PF3_M0PWM3);
GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3, GPIO_STRENGTH_2MA,
GPIO_PIN_TYPE_STD);
// configure the PWM0 peripheral, gen 1, outputs 2 and 3
SysCtlPeripheralEnable(SYSCTL_PERIPH_PWM0);
@ -110,7 +111,9 @@ void start_signal() {
roundf((float)gSystemClock / PWM_FREQUENCY));
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_2,
roundf((float)gSystemClock / PWM_FREQUENCY * 0.4f));
PWMOutputState(PWM0_BASE, PWM_OUT_2_BIT, true);
PWMPulseWidthSet(PWM0_BASE, PWM_OUT_3,
roundf((float)gSystemClock / PWM_FREQUENCY * 0.4f));
PWMOutputState(PWM0_BASE, PWM_OUT_2_BIT | PWM_OUT_3_BIT, true);
PWMGenEnable(PWM0_BASE, PWM_GEN_1);
}